Recently, there has been a lot of interest in Quantum Cellular Automata (QCA) technology because of its potential for low power consumption, low complexity, compact area, and low latency. Simultaneously, approximate computing, a new paradigm in nanotechnology, streamlines the computational process and emerges as a high-performance, low-power design approach for arithmetic circuits. Also, the XOR gate has been widely used in digital circuit design. The full-adder (FA) circuit is a key component of QCA technology and is utilized in arithmetic logic unit operations like division, multiplication, and subtraction. Thus, a great deal of research has been done on the design of approximate FA, full-subtractor (FS), and full-adder/subtractor (FA/S). In particular, an area of 0.01 µm2 and a latency of 0.5 clock phases were accomplished in the approximate FA and FS designs; similarly, the approximate FA/S designs showed just 10 cells used in implementation, an area of 0.01 µm2, and a latency of 0.5 clock phases. The effectiveness of these designs was validated through functional verification with the QCADesigner program. This study presents three new and effective QCA-based circuits, based on XOR logic: an approximate FA, an approximate FS, and an approximate FA/S. Each design has inputs on one side and outputs on the other, making it easier to access the components without being encircled by other cells. The results of the simulation show that these designs are not only more efficient than previous designs in terms of speed and area; they also perform better than other circuit designs.
