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abbas ramezani

abbas ramezani

Academic rank: Assistant Professor
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Education: PhD.
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Faculty: Faculty of Engineering
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Research

Title
Implementation of a PSoC-based flexible and lowpower processor
Type
Presentation
Keywords
Processor, DWT, FFT, Architecture, power consumption.
Year
2016
Researchers sohiela gharavi ، abbas ramezani

Abstract

A flexible and low-power PSoC-basecd platform has been implemented for discrete wavelet transform (DWT) and Fast Fourier transform (FFT) applications. Our designs comprise 1024- point FFT and 5-stage parametric DWT and digital filter processing units. High accuracy, low power consumption, flexibility and minimal hardware resource usage are characteristics of this design. This portable processor has been implemented on CY8C5868AXI-LP035 from PSoC5LP (ARM Cortex M3) Cypress family. Total power consumption of the design for DWT and FFT is 90 mW and 38.35mW respectively in 67MHZ frequency which is an appropriate value when compared with ASIC, FPGA and DSP based structures. The designed structure has high accuracy in computation, so that the maximum error is about 0.04 compared with the actual results.